Answer in brief
CVE-2024-35942 records a Medium severity (CVSS 5.5) vulnerability in pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
CVSS is 5.5. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Product | Affected versions | Fixed versions |
|---|---|---|
| cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | Not reported | Not reported |
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=556f5cf9568af772d494cff24ffaa7ea41e1ab40 <7c280b5fa64fe78a1a1d198b44a2d90bda36ed65 || >=556f5cf9568af772d494cff24ffaa7ea41e1ab40 <9d3f959b426635c4da50dfc7b1306afd84d23e7c || >=556f5cf9568af772d494cff24ffaa7ea41e1ab40 <b13c0d871cd878ff53d25507ca535f59ed1f6a2a || >=556f5cf9568af772d494cff24ffaa7ea41e1ab40 <697624ee8ad557ab5417f985d2c804241a7ad30d | 7c280b5fa64fe78a1a1d198b44a2d90bda36ed65, 9d3f959b426635c4da50dfc7b1306afd84d23e7c, b13c0d871cd878ff53d25507ca535f59ed1f6a2a, 697624ee8ad557ab5417f985d2c804241a7ad30d |
| Linux/Linuxgeneric | 5.19 | Not reported |
Published upstream
May 19, 2024
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Oct 30, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Oct 30, 2026
In the Linux kernel, the following vulnerability has been resolved: pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain According to i.MX8MP RM and HDMI ADD, the fdcc clock is part of hdmi rx verification IP that should not enable for HDMI TX. But actually if the clock is disabled before HDMI/LCDIF probe, LCDIF will not get pixel clock from HDMI PHY and print the error logs: [CRTC:39:crtc-2] vblank wait timed out WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c:1634 drm_atomic_helper_wait_for_vblanks.part.0+0x23c/0x260 Add fdcc clock to LCDIF and HDMI TX power domains to fix the issue.
Quoted source text, attributed separately from HOL analysis.