Answer in brief
CVE-2026-53354 records a Unknown severity vulnerability in arm64: errata: Mitigate TLBI errata on various Arm CPUs. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
Answer in brief
CVE-2026-53354 records a Unknown severity vulnerability in arm64: errata: Mitigate TLBI errata on various Arm CPUs. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
A CVSS score is not reported in the current record. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <925058203229403008d77a52b1e63e2ae5f4a3cf || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <8364384ae82fbffdf8968abaac3455ed854da18d || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <7c3ad9365079e716b57d2363d3081ee7680cc18e || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <e717a4d08779f1a28d6e0275e75040b12c33c753 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <4e7c80742e6dada9f8b9ad63f3a49c03af07ecb8 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <d4fd4282204044fdedd1e42abbe70a9206f74ec0 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <1b47b1e1d8675fdf5f6e11e7fa19c704d8c6f5cd || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <1268c64e2bcb6e968152990e87bd10c440fcc9c0 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <cfd391e74134db664feb499d43af286380b10ba8 | 925058203229403008d77a52b1e63e2ae5f4a3cf, 8364384ae82fbffdf8968abaac3455ed854da18d, 7c3ad9365079e716b57d2363d3081ee7680cc18e, e717a4d08779f1a28d6e0275e75040b12c33c753, 4e7c80742e6dada9f8b9ad63f3a49c03af07ecb8, d4fd4282204044fdedd1e42abbe70a9206f74ec0, 1b47b1e1d8675fdf5f6e11e7fa19c704d8c6f5cd, 1268c64e2bcb6e968152990e87bd10c440fcc9c0, cfd391e74134db664feb499d43af286380b10ba8 |
| Linux/Linuxgeneric | 3.7 | Not reported |
Published upstream
Jul 1, 2026
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Aug 5, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Jul 1, 2026
In the Linux kernel, the following vulnerability has been resolved: arm64: errata: Mitigate TLBI errata on various Arm CPUs A number of CPUs developed by Arm suffer from errata whereby a broadcast TLBI;DSB sequence may complete before the global observation of writes which are translated by an affected TLB entry. These errata ONLY affect the completion of memory accesses which have been translated by an invalidated TLB entry, and these errata DO NOT affect the actual invalidation of TLB entries. TLB entries are removed correctly. This issue has been assigned CVE ID CVE-2025-10263. To mitigate this issue, Arm recommends that software follows any affected TLBI;DSB sequence with an additional TLBI;DSB, which will ensure that all memory write effects affected by the first TLBI have been globally observed. The additional TLBI can use any operation that is broadcast to affected CPUs, and the additional DSB can use any option that is sufficient to complete the additional TLBI. The ARM64_WORKAROUND_REPEAT_TLBI workaround is sufficient to mitigate the issue. Enable this workaround for affected CPUs, and update the silicon errata documentation accordingly. Note that due to the manner in which Arm develops IP and tracks errata, some CPUs share a common erratum number.
Quoted source text, attributed separately from HOL analysis.
A CVSS score is not reported in the current record. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <925058203229403008d77a52b1e63e2ae5f4a3cf || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <8364384ae82fbffdf8968abaac3455ed854da18d || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <7c3ad9365079e716b57d2363d3081ee7680cc18e || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <e717a4d08779f1a28d6e0275e75040b12c33c753 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <4e7c80742e6dada9f8b9ad63f3a49c03af07ecb8 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <d4fd4282204044fdedd1e42abbe70a9206f74ec0 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <1b47b1e1d8675fdf5f6e11e7fa19c704d8c6f5cd || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <1268c64e2bcb6e968152990e87bd10c440fcc9c0 || >=58d0ba578bc3b7c044d4ef570307bcb03862cb66 <cfd391e74134db664feb499d43af286380b10ba8 | 925058203229403008d77a52b1e63e2ae5f4a3cf, 8364384ae82fbffdf8968abaac3455ed854da18d, 7c3ad9365079e716b57d2363d3081ee7680cc18e, e717a4d08779f1a28d6e0275e75040b12c33c753, 4e7c80742e6dada9f8b9ad63f3a49c03af07ecb8, d4fd4282204044fdedd1e42abbe70a9206f74ec0, 1b47b1e1d8675fdf5f6e11e7fa19c704d8c6f5cd, 1268c64e2bcb6e968152990e87bd10c440fcc9c0, cfd391e74134db664feb499d43af286380b10ba8 |
| Linux/Linuxgeneric | 3.7 | Not reported |
Published upstream
Jul 1, 2026
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Aug 5, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Jul 1, 2026
In the Linux kernel, the following vulnerability has been resolved: arm64: errata: Mitigate TLBI errata on various Arm CPUs A number of CPUs developed by Arm suffer from errata whereby a broadcast TLBI;DSB sequence may complete before the global observation of writes which are translated by an affected TLB entry. These errata ONLY affect the completion of memory accesses which have been translated by an invalidated TLB entry, and these errata DO NOT affect the actual invalidation of TLB entries. TLB entries are removed correctly. This issue has been assigned CVE ID CVE-2025-10263. To mitigate this issue, Arm recommends that software follows any affected TLBI;DSB sequence with an additional TLBI;DSB, which will ensure that all memory write effects affected by the first TLBI have been globally observed. The additional TLBI can use any operation that is broadcast to affected CPUs, and the additional DSB can use any option that is sufficient to complete the additional TLBI. The ARM64_WORKAROUND_REPEAT_TLBI workaround is sufficient to mitigate the issue. Enable this workaround for affected CPUs, and update the silicon errata documentation accordingly. Note that due to the manner in which Arm develops IP and tracks errata, some CPUs share a common erratum number.
Quoted source text, attributed separately from HOL analysis.