Answer in brief
CVE-2026-90124 records a Unknown severity vulnerability in irqchip/renesas-rzg2l: Fix loss of interrupt. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
A CVSS score is not reported in the current record. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <c043591f03a8111f7d306b8122c444a949486269 || >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <b5ba8b861b5d833394bd23df3f4b59883ef18c88 || >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <3791e242ec2e5a5cd9e010a75ed1125d0e84d394 || >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <38c6831fefde0ff89f8d2dcb924f957a89dec414 || >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <dbecbe23dc606c4af68b4591a41124186f5c1802 || >=3fed09559cd8be79568d368ce02bf7f2d56259b6 <50b10bd0c2d721ad38abd1abe3acdefb6caa0944 | c043591f03a8111f7d306b8122c444a949486269, b5ba8b861b5d833394bd23df3f4b59883ef18c88, 3791e242ec2e5a5cd9e010a75ed1125d0e84d394, 38c6831fefde0ff89f8d2dcb924f957a89dec414, dbecbe23dc606c4af68b4591a41124186f5c1802, 50b10bd0c2d721ad38abd1abe3acdefb6caa0944 |
| Linux/Linuxgeneric | 6.0 | Not reported |
Published upstream
Sep 17, 2026
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Oct 19, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Sep 17, 2026
In the Linux kernel, the following vulnerability has been resolved: irqchip/renesas-rzg2l: Fix loss of interrupt rzg2l_clear_irq_int() and rzg2l_clear_tint_int() perform a read-modify-write on the ISCR/TSCR status registers to clear the bit for the interrupt just handled. Since these registers are write-0-to-clear per bit, this is racy: If another interrupt's status bit gets set between the read and the write, that bit is written back as 0 by the software-constructed value, clearing an interrupt that hasn't been serviced yet and losing it. This can be reproduced by triggering multiple interrupts at once, e.g.: gpioset -c gpiochip0 355=0 353=0 328=0 352=0 Fix this by writing back only the bit being cleared, with all other bits set to 1, instead of read-modify-writing the whole register. Since 1-bits are left unchanged by hardware, concurrently-set status bits for other interrupts are preserved.
Quoted source text, attributed separately from HOL analysis.