Answer in brief
CVE-2026-90243 records a Unknown severity vulnerability in iommu/vt-d: Clear Present bit before tearing down copied context entry. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
A CVSS score is not reported in the current record. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=c7191984e5aade540f1a3845a116537c89572655 <97750a8dce79c1a9b2b2d2a020b61b800141996c || >=c7191984e5aade540f1a3845a116537c89572655 <3c88cfedc7768b1ae2dc7ddc71547ae9a1aaff7d || >=c7191984e5aade540f1a3845a116537c89572655 <6b822d18c33af9d1e16a8e5e6aa6e656987b09de || >=c7191984e5aade540f1a3845a116537c89572655 <f532c57985b1a7d6b7e37e05506b46d413e5cca4 | 97750a8dce79c1a9b2b2d2a020b61b800141996c, 3c88cfedc7768b1ae2dc7ddc71547ae9a1aaff7d, 6b822d18c33af9d1e16a8e5e6aa6e656987b09de, f532c57985b1a7d6b7e37e05506b46d413e5cca4 |
| Linux/Linuxgeneric | 6.12 | Not reported |
Published upstream
Sep 17, 2026
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Sep 17, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Sep 17, 2026
In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down copied context entry copied_context_tear_down() zeroes the 128-bit context entry with context_clear_entry() while the Present bit is still set, and only then issues the context-cache and IOTLB invalidations. This leaves a window in which hardware can fetch a torn entry, with some fields already zeroed while Present is still set, leading to unpredictable behaviour or spurious faults. While x86 provides strong write ordering, the compiler may reorder the writes to the two 64-bit halves of the entry, and the hardware fetch is not guaranteed to be atomic with respect to multiple CPU writes. There is no cacheline flush before the invalidation either, so on an IOMMU without coherent access to the context table the zeroed entry may not be visible to hardware at the point the invalidation is submitted. Apply the same ownership handshake described in the VT-d spec, Section 6.5.3.3 ("Guidance to Software for Invalidations"): clear only the Present bit, flush it out to the IOMMU, perform the invalidations, and only then zero the remainder of the entry.
Quoted source text, attributed separately from HOL analysis.