Answer in brief
CVE-2026-98546 records a Unknown severity vulnerability in arm64/boot: Disable trapping of PMZR_EL0 writes to EL2. The current sources do not mark it as known exploited. The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
Analysis pending evidence review
HOL Guard separates source facts from reviewed analysis. See the methodology.
A CVSS score is not reported in the current record. The current sources do not mark it as known exploited. Treat this as a source-backed prioritization signal, not a statement about your environment.
Analysis status
Analysis pending evidence review
Factual feed record only; HOL analysis is not approved for indexing. Read the methodology.
The current feed maps Linux/Linux (generic), Linux/Linux (generic). Check affected ranges and fixed versions before updating.
| Package | Affected range | Fixed version |
|---|---|---|
| Linux/Linuxgeneric | >=686d8f7b592f3466f44aea653c8147611b351c83 <bb8c90c86441c090e9036f019cf1b4d7894a2c40 || >=858c7bfcb35e1100b58bb63c9f562d86e09418d9 <071f51188a5d8ec10535541255587976d12fc7d8 || >=858c7bfcb35e1100b58bb63c9f562d86e09418d9 <ce71865bf43f88bed9d9218e9218e537150be506 || >=858c7bfcb35e1100b58bb63c9f562d86e09418d9 <2bc6b218717b9d08f466f88209251d54bc09b207 || 882f78400322c0aec4b641a7168adad9a66bc0c2 || >=6.12.25 <6.12.112 || >=6.14.4 <6.15 | bb8c90c86441c090e9036f019cf1b4d7894a2c40, 071f51188a5d8ec10535541255587976d12fc7d8, ce71865bf43f88bed9d9218e9218e537150be506, 2bc6b218717b9d08f466f88209251d54bc09b207, 6.12.112, 6.15 |
| Linux/Linuxgeneric | 6.15 | Not reported |
Published upstream
Oct 18, 2026
Evidence: source:cvelist:source_dates:source-dates:recordSource modified
Oct 19, 2026
Evidence: source:cvelist:source_dates:source-dates:recordFirst seen by HOL
Oct 18, 2026
In the Linux kernel, the following vulnerability has been resolved: arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 __init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2. PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a write from EL0 reaches the trap and takes the host down without a panic message. Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9 bits.
Quoted source text, attributed separately from HOL analysis.